Intel is using Manufacturing Day 2020 to announce a pair of new chip R&D projects with the federal government.
One of the projects is a 3-year partnership with Sandia National Labs — a government R&D lab focused on nuclear research — to research the use of neuromorphic computing to handle demanding computational problems.
Neuromorphic computing, which has also been researched by the likes of IBM , Qualcomm and Micron , involves developing chip architectures that are patterned on the functioning of neurons in the human brain — and which by doing so can exhibit a human brain’s flexibility, power efficiency and ability to respond to new data.
A lot of current neuromorphic computing R&D involves “edge” applications such as robotics, industrial automation and understanding and responding to the physical actions of smartphone users. By contrast, Intel and Sandia plan to research demanding spiking neural network workloads such as physics modeling and graph analytics.
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The research will involve the use of a system that contains 50 million artificial neurons and relies on Intel’s recently-announced Loihi neuromorphic chip. With each Loihi chip only containing 130,000 neurons, this points to the use of more than 380 chips (given how such systems are designed, 384 chips is a possibility). Intel/Sandia also plan to eventually develop more powerful systems that rely on a next-gen Intel neuromorphic research chip.
The second government project announced on Friday involves working with the Naval Surface Warfare Center to develop advanced multi-chip packages that could be used in military equipment. The effort, known as SHIP, will include developing prototype chip packages that pair “special-purpose government chips” with an assortment of Intel silicon, including CPUs, ASICs and FPGAs.
Notably, the packages will rely on Intel’s Foveros, EMIB and Co-EMIB packaging technologies, one or more of which will be used in a variety of PC and data center processors in the coming years. Foveros involves the stacking of logic chips; EMIB creates high-speed interconnects between chips placed side-by-side within the same package; and Co-EMIB creates horizontal interconnects between a pair of Foveros-stacked chips (effectively like skybridges between two office towers).
CEO Bob Swan and other Intel execs have signaled that the chip giant plans to lean heavily on its packaging technology strengths to fend off rivals in the coming years, as it deals with a fresh manufacturing setback.
Intel’s stock plunged in July after the company disclosed in its Q2 report that manufacturing yields for its next-gen, 7-nanometer (7nm), manufacturing process node are “trending approximately twelve months behind the company’s internal target.” As a result, the company doesn’t plan to release its first 7nm PC CPU until late 2022 or early 2023 and its first 7nm server CPU until the first half of 2023.
For comparison, AMD is expected by many to launch CPUs relying on Taiwan Semiconductor’s 5nm node, which is considered competitive with Intel’s 7nm node, by the first half of 2022.
This article was originally published by TheStreet.